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Keynote & Invited Speakers(2014)

Plenary Session

Dr. Tzu-Yin Chiu, CEO and Executive Director, SMIC

Dr. Tak H. Ning, IBM Fellow and  Member of US National Academy of Engineering, IBM T.J. Watson Research Center 

Dr. Kevin Zhang, Intel Fellow and vice president in the Technology and Manufacturing Group, Intel Corporation

Confirmed Invited Speakers

Symposium I: Device Engineering and Technology

Symposium II: Lithography and Patterning

Symposium III: Dry & Wet Etch and Cleaning

Symposium IV: Thin Film Technology

Symposium V: CMP, Wafer Substrate Polishing and Post-Polish Cleaning

Symposium VI: Materials and Process Integration for Device and Interconnection

Symposium VII: Packaging and Assembly

Symposium VIII: Metrology, Reliability and Testing

Symposium IX: Emerging Semiconductor Technologies

Symposium X: Advances in MEMS and Sensor Technologies

Symposium XI: Circuit Design, System Integration and Applications

Symposium XII: Si Materials and Photovoltaic Technology



Symposium I: Device Engineering and Technology

** Keynote Speech * Invited Speech
* Bruce Doris ,IBM,USA
Device Design Considerations for Future Logic Technologies

* Prof. Adrian Ionescu, Professor, KAIST
Emerging Devices for Energy Efficient Computing

* Prof. Moon Gyu Jang, Professor, Ecole Polytechnique Fédéral de Lausanne (EPFL),Switzerland
Silicon Nanostructure Thermoelectric Devices

* Prof. Byung Hun Lee, Professor, School of MSE, Gwangju Institute of Science and Technology
Novel Electrical Characterization Methods for Graphene Devices

* Prof. Durgamadhab Misra, Professor, NJIT
Reliability Considerations of High-K Gate Dielectrics Deposited by Various Intermediate Treatment

* Prof. Mikael Ostling, Professor, KTH - Royal Institute of Technology, Sweden
Opportunities with SiC power switches and high performance drive electronics

* Prof. Byung-Gook Park, Professor, Dept. of ECE, Seoul National University
Channel Stacked Array (CSTAR) NAND Flash Memories

* Prof. Jason Woo, Professor, University of California, Los Angeles
The device physics and scalability of Deeply-Retrograde-Well MOSFET

* Richard Wachnik, Director,IBM,USA
Gate Resistance in High Performance CMOS Technologies

* Prof. Jianfu Zhang, Professor, Liverpool John Moores University,UK
Impact of different types of defects on NBTI lifetime prediction

* Prof. Juin J. Liou, Professor, University of Central Florida
Electrostatic Discharge Protection of Automotive Integrated Circuits

* Prof. Wei Lu, Professor, University of Michigan – Ann Arbor
RRAM Filament Structure and Growth Dynamics

* Prof. Salvador Pinillos Gimenez, Professor, Centro Universitário da FEI (FEI University Center), Brazil
Innovative Layout Styles to Boost the MOSFET Electrical Performance

Symposium II: Lithography and Patterning

 **Ralph Dammel, CTO,AZ Mciorelectronic material
Directed Self Assembly: Climbing The "Slope of Productivity 

* Kevin Lucas , Manager, Synopsys
The role of lithography enhancements in future device node scaling

* Dr. Seji Nagahara,Senior Manager / Chief Scientist, Tokyo Electron Limited
Next generation patterning technologies for semiconductor device

* Hidetami Yaegashi, Chief Engineer, Tokyo Electron Limited
Optical Lithography Extension technique with Multiple-Patterning process

* Prof. Wu Wei, Associate Professor, University of Souther California
Sub-5 nm Patterning Using Helium Ion Beam Lithography and Nanoimprint lithography

* Prof. Shiyuan Liu, Professor, Huazhong University of Science and Technology
Mueller matrix polarimetry: A powerful tool for nanostructure metrology

* Dr. Sven Burger, Director, JCMwave GmbH
Challenges for Electromagnetic Field Solvers in Advanced Lithography and Optical Metrology

* Prof. Laura Waller,Assistant Professor, University of California, Berkeley
Measuring 3D mask edge effects using phase imaging

* Prof. Yanqiu Li, Professor, Beijing Institute of Technology
Vector image and its applications in lithography

* Yongfa Fan, Staff CAE, Synopsys
3D Resist Profile Modeling Strategies for OPC Applications

* Dr. Xuelong Shi, Director, SMIC
Critical Aspects of Patterning at 28nm Node and Beyond

* Dr. Xingang Pan, Director, Shanghai/XuZhou B&C Chemical Co. Ltd
Advanced Monomers Development for Photoresist Manufacturing

* Prof. Runfu Zong ,Yayi Wei, Professor, Kingsemi Co. Ltd.
Progress of Advanced Track Manufacturing in China

* Prof. Chen Baoqin, Professor, Institute of Microelectronics, CAS
Micro- Lithography, Electron Beam Lithography and Standardization Technology in China

* R. Sakamoto, R&D manager, Nissan Chemical Inc
The Novel Spin-on Hard Mask and Ultra thin UL material for EUVL

* Dr. Hustad ,Phillip  , Dow chemical
DSA lithography technology progressing

* Oliver Kienzle, GM, Carl Zeiss
Photomask challenges in leading edge lithography

*Dr. Phillip Hustad, Dow Electronic Materials,  
Recent Advances in EUV Resist Technology

* Prof.Paul Ackmann, Professor,Global Foundries
Regardless of how you do it (Commercial, Captive, JV) reticles continue to drive technology

Symposium III: Dry &Wet Etch and Cleaning

** Keynote Speech * Invited Speech

*Lee Chen, Senior Technical Staff of TEL, Tokyo Electron Limited
The control of electron shading in a DC/RF parallel-plate etcher for the contact-etching processes

*Kaidong Xu, Manager, IMEC vzw, Leuven, Belgium
N10 Logic Patterning

*Samer Banna, Director, Applied Materials
Pulsed High-Density Plasmas for Advanced Dry Etching Processes

*Xingcai Su, Senior Director, AMEC
Dielectric Etch Tool Development for the Applications of 20nm and Beyond Technology Node

*Nicolas Posseme, CEA-LETI, France
New fluorocarbon free chemistry proposed as solution to limit porous SiOCH film modification during etching

** Peter Loewenhardt, VP of Etch , Applied Materials
Challenges in Wafer Clean - and Improvement Paths

Symposium IV: Thin Film Technology

** Prof. Junqiao Wu, Professor,UC Berkeley, USA
2D semiconductors for microelectronics and optoelectronics

* Dr. Andriy Hikavyy, Researcher,IMEC, Belgium
Application of Selective Epitaxial Growth in the sub 20 nm FinFET device fabrication

* Paul Ma, Ph.D, Metal deposition products, SSG, AMAT
Selectivity CVD Co Capping for Improved Cu Interconnect Reliability

* Prof. Zhen Zhang, Angstrom Lab at Uppsala University, Sweden
Advanced contact technology for extremely scaled device applications

* Prof. Hideki Hashimoto, Professor,Toray Research Center, Japan
Detailed Characterization of High-k and Low-k Thin Film

** Dr. Mike Chudzik, Development Unit Process Project, IBM
Atomic Layer Deposition Trends and Challenges in High-k/Metal Gate and Alternative Channel CMOS Processing

* Dr. Ming Li,Sr. Director, LAM
New Challenges of PECVD Dielectric Film Deposition for Advanced Semiconductor Technology

* Dr. Mark J. Willey,Sr. Scientist, Moses Lake Industries, Inc
Advanced Secondary Levelers for Faster Fill on Sub 50nm Features

* Dr. David De Roest, Sr. Researcher, ASM Belgium
Applications of (PE)ALD in 14nm node and beyond

* Dr. Xiaoping Shi, Sr. Researcher,IMEC, Belgium
PEALD Oxide development and its applications for advanced CMOS technology

* Dr. Artur Kolic, Sr. Director,LAM
Electroless Technology for the Upcoming Challenges in Interconnect Metallization

* Dr. Zhao Chao, IME, Chinese Academy of Science, China
Processing challenges and possible solutions of High-last integration of FinFETs for 16nm node

* Allan He,Department Manager ,Sr. Adv. Module, SMIC, China
eSiGe process challenge at 28nm node and beyond

* Dr. PeiJun Ding,Vice President, North Microelectronics, Beijing, China
High performance TiN hardmask system for 32-nm and beyond technology nodes

* Prof. Qu Xinping, School of microelectronics, Fudan university, Shanghai, China
Novel CoMo diffusion barrier for copper interconnect

* Prof. Hong-Yu Yu, Prof.,South University of Science and Technology of China
A novel gate stack engineering technology of sub-20nm CMOS

Symposium V: CMP Wafer Substrate Polishing and Post-Polish Cleaning

* Prof. S.V. Babu, Professor, Clarkson University
Chemical mechanical polishing of emerging barrier materials for Cu metallization

* Ray Yang,Technical support manager, Levitronix
Novel Slurry Injection System for Reduced Slurry Usage and Enhanced CMP Performance

* Prof. Arthur Chen, Professor, NTUST
Effects of Control Mode of Electrical Copper CMP Process for 3DS-IC Applications

* Kun Xu, Manager,Applied Materials
Replacement Metal Gate CMP Challenges and Solutions

* Peter Lee, Director,Cabot Microelectronics Director
A Novel System for Slurry Recycling and Waste Water Permeation

* Jun Tokuda,R&D Manager, Rare Earth System
A new generation of colloidal ceria abrasive

* Syuhei Kurokawa, Professor, Kyushu University
Approach to High Efficient CMP for Power Device Substrates

* Andy Kim, RD Manager,Mega Fluid Systems
Advanced Monitoring of Slurry Quality for Consistent CMP Processing

* Kee Joon Oh, principal engineer, SK hynix Inc., Korea
CMP Challenges toward DRAM Device below 20nm Technology

Symposium VI: Materials and Process Integration for Device and Interconnection

**Reza Arghavani, Managing Director of Technology,Lam Research Corporation
New Generations of Tools Sets that Enable

*Jin Ping Han,Client-site lead technologist, IBM
Overview of Process Optimization on Local Layout Effect in Advanced HKMG Bulk and eDRAM-based SOI Technologies

** Zhuan Liu,Technical Product Director, Nanometrics Inc.
Optical CD Metrology for Advanced Device Manufacturing

*Zhaoyun Tang, Professor,Institute of Microelectronics, Chinese Academy of Sciences, Beijing
Impacts of Back Bias on FD-SOI Device Characteristics

** Todd Henry, Chief Marketing Officer ,Applied Materials
Implant Related Device Performance and Yield (DPY) and Precision Materials Engineering Solutions (PME) for FINFET Device and Process Margin Challenges.

*Jianhua Ju,Assistant director , SMIC
A Comparison of Device Architecture, Electrical Performance and Process Flow between FinFET and Planar MOSFETs

**Adam Brand, Professor,Advanced Product Technology Development at Applied Materials Silicon Systems
Precision Materials Engineering to Meet FinFET Scaling Challenges Beyond 14nm

**Huilong Zhu, Professor,Academy of Sciences, Beijing, China
A Study of Bulk FinFET Integration Process for 16nm node and beyond

*Leon Shohet , Professor,Univ. Wisconsin
Damage to Low-k Dielectrics

**Roger Quon, Senior Manager,IBM
Engineering & Integrating Dielectrics for Semiconductor (BEOL) Interconnect

**Dick James , Senior Manager,Chipworks
Recent Innovations in Leading-Edge Silicon Devices

Symposium VII: Packaging and Assembly

** Keynote Speech * Invited Speech

**Huang, Herb H,Sr. Director, SMIC
Perspectus of 3D Silicon Devices and System Integration Technology Opportunities Enabled by TSVBased Vertical Interconnect Solutions

**Kim, Sng Jin, Professor,GT PRC
3D Organic Package Development and Its Commercialization

**John Y. Xie, Director, Packaging R&D, Altera Corp.
Low Cost 3D IC Stacking Enabling High Performance FPGA SOC Integration

**Hong Shi,Technical Director, Xilinx, Inc.
Ultrahigh Speed Transceiver Interconnect Design with Stacked Silicon Integration Technology

**Chow, Jimmy OR  Lin, YB President/CEO, APS/JCET
Advanced MIS packaging technologies

**Guo Yifan,VP Engineering, ASE Shanghai.
Semiconductor Packaging Solutions in a Mobile World

**Fu, Huili, Dr.Chief Packaging Expert,Huawei HiSilicon.
The Challenges of the Package Technologies with the Progress of Wafer Process

**Shangguan dong kai, CEO, NCAP.
Enabling 3D Packaging Through Collaborative Innovation

*Han jianglong, Chairman, NCAP.
The Challenges and Opportunities of Epoxy Molding Compound

*Lily Khor & Lynn Simporios-Guirit,CTO/Section Manager, Carsem Semiconductor (Suzhou) Co. Ltd.
Feasibility Study on MEMS Packaging Low Cost Solutions

*M.L. Huang, Professor,Dalian University of Technology
Electromigration Reliability of Lead-free Solder Interconnects

*Kong/Jeff/Kunpeng Ding, R&D Department Engineer,Shennan Circuits Co.,LTD..
The Technical Problems of Discrete Embedded Technology

*Roger Liang, Director,Nanyan.
IC Substrate New Developments

*Zhang, Eric,Manager, Henkel.
Die Attech Adhesive Development Roadmap

*Tan, Eric, Global Product Manager,Hearaus.
Development Trends and New Product Introduction of WB Wires

*Tonglong zhang, Deputy CTO Nantong Fujitsu Microelectronics limited.
Flipchip CSP with Au stud bump to Au plated substrate interconnection

*Zhang Li /Guo HongYan, Director of Engineering,Jiangyin changdian Advanced Packaging Co.Ltd.
Copper Pillar Bumping Technology - the Promising Ecosystem Changer

Symposium VIII: Metrology, Reliability and Testing

** Prof. Zebo Peng, Professor,Linkoping Univ. Sweden
Reliability Challenges for the Design of Cyber-Physical Systems

* Prof. Johnny Xu, Professor, Hong Kong Chinese Univ.
On Achieving Cost-Efficient Circuit Timing Error Resilience

* Yu Huang,Researcher, Mentor Graphics Researcher
The Next Generation of SoC Test Compression

* Xinli Gu, Director, Huawei, US
Metrics Development of Characterizing Test Algorithms Activity in Relation to Physical Memory Structure

** Barry Linder, RSM, IBM T. J. Watson, USA

* Prof. Sang Baeg, Professor, Hanyang Univ, Korea
Metrics Development of Characterizing Test Algorithms Activity in Relation to Physical Memory Structure

** Dirk Pfeiffer, RSM, S. Manager, IBM T. J. Watson, USA
Materials Characterization Techniques For Next Generation Semiconductor Devices

Symposium IX: Emerging Semiconductor Technologies

**Steve S. Chung, Chair Professor,Chair Professor,Fellow,NCTU,UMC,TEEE
The Random Dopant Fluctuations of Ultra-Scaled CMOS Devices

**Edward Yi Chang, VP of R&D Office, Department of Electronics Engineering, Chiao-Tung University, Hsinchu, Taiwan
Passivation of Al2O3/n, p-In0.53Ga0.47As interfaces: Influence of plasma enhanced atomic layer deposition aluminum nitride with various plasma powers

**Prof. Kuan-Neng Chen, Professor, Department of Electronics Engineering, Chiao-Tung University, Hsinchu, Taiwan
Development of Key Technologies, Schemes, and Applications in 3D/2.5D Integration

**Prof. Chao-Hsin Chien, Professor, Department of Electronics Engineering, Chiao-Tung University, Hsinchu, Taiwan
Body-tied Ge Tri-Gate Junctionless MOSFETs Directly on Si with NiGe Source/Drain

**Prof. Paul Chow, Professor, RPI, USA
SiC and GaN High Voltage Power Devices and Fabrication Processes

**Prof. Tuo-Hung, Professor, Department of Electronics Engineering, Chiao-Tung University, Hsinchu, Taiwan
Emerging RRAM for 3D Storage-Class Memory

**Nanomaterials analysis using electron microscopy
Hsiang-Lan Lung,Professor,Macronix Interantional Ltd., Taiwan

**Prof. Horng-Chih Lin, Professor, Department of Electronics Engineering, Chiao-Tung University, Hsinchu, Taiwan
Fabrication of Metal Oxide Thin-Film Transistors with Film Profile Engineering

**Jianfu Ding, Dr.,National Research Council, Canada
Semiconducting Single-Walled Carbon Nanotubes Enriched by Polyfluorene Extraction for High Network Density Thin Film Transistors

**Prof. Ki Tae Nam, Professor, Dep. of Materials sci and eng, Seoul national univeristy
Bio-inspired process and materials

**Prof. Ju Sang Park, Professor, Sch. of EE, Yonsei University, Korea
Multi-Heterostructure of layered WS2, MoS2 for New functional material

**Koukou Suu, General Manager,ULVAC, Inc
Tool and process development for emerging non-volatile memory (ReRAM, PCRAM, STT-MRAM) production

**JungHoon Lee, Vice president in R&D Division, SK HYNIX INC.
Requirements for the emerging memory era

**Prof. Changhwan Choi,Professor, Hanyang University
P-type Kesterite Compound Semiconductor Material Prepared By Sputtering and Electro Spray Deposition For Solar Cell Applications

**Prof. Sehun Kwon, Professor, Pusan Univ
ALD assisted synthesis of highly ordered nanostructure arrays

Symposium X:Advances In MEMS and Sensor Technologies

** Dr. William C. Tang,Professor,University of California, USA
MEMS Microfluidic Platforms for Cancer Studies

** Dr. Madoo Varma, Director, Intel, USA
Opportunities at the intersection of biology and silicon

** Dr. Yumin Lu,Research Fellow, Shanghai institute of Microsystems and information Technology, China
An X-band Class-E Power Amplifier with MEMS Output Impedance Tuner

*Prof. Tom Baehr-Jones, Professor, University of Delaware, USA
Multi-Project Wafer (MPW) runs for Silicon Photonics systems integration

*Prof. Juergen Brugger, Professor, EPFL, Swizterland
Self-assembled liquid-filled smart MEMS capsules

*Prof. Dr. Thomas Gessner, Director, Fraunhofer Institute for Electronic Nano Systems ENAS Chemnitz, Germany
Smart monitoring systems for a green future

*Dr. Steve Liang, CTO, Jiangsu Changjiang Electronics Technology Co., Ltd, China
Packaging for MEMS and Sensors

*Prof. Zewen Liu, Professor, Tsinghua University, China
Tunable RF MEMS and Its Applications

*Dr.Yumin Lu, Professor, SiTRI Group, Shanghai, China
An X-band Class-E Power Amplifier with MEMS Output Impedance Tuner

*Prof. Wilfried Mokwa, Professor, RWTH Aachen, Germany
Intelligent Medical Implants Based on MEMS Technologies

*Prof. Mina Rais-Zadeh, Professor, University of Michigan, USA
Gallium Nitride Based Micromechanical Resonators and Resonant Sensors

*Prof. Chongfei Shen, President, Magnity Electronics in Shanghai, China
Novel uncooled microbolometer using optical readout technology

*Prof. Peng-Fei Wang, Professor, Fudan University, China
SemiFloating Gate Transistor and its possible application (including image sensor)

Symposium XI: Circuit Design, System Integration and Applications

*Prof. Weixin Gai, Professor,Institute of Microelectronics Peking University
Next-Generation Energy-Efficient High-Speed Serial Links

*CZ Chen, Director, Cadence Design Systems, Inc.
Reliability aspects of advanced IC technology -- circuit design perspectives

*Prof. Lingli Wang, Professor, Fudan University
Customizable FPGA Computing Platform and Reliability Improvement

*Prof. Tsung-Yi Ho, Professor, Department of Computer Science and Information Engineering, National Cheng Kung University, Taiwan
Physical Design of Microfluidic Biochips

*Prof.Pingqiang Zhou, Professor, Shanghai Tech University
On-Chip Switched-Capacitor DC-DC Converters in Multicore Systems

*Prof.Yuefan Deng, Professor, tate University of New York at Stony Brook
A new graph theory approach for supercomputer network

*Liang Chen,Cadence Design Systems
Challenges and novel solutions for SoC verification

*Hong Wan, Professor,Magnetic Sensor BU
Are MEMS Motion Sensors Already in Your Life

*Yangdong Deng, Philosophiae Doctor, EE,Tsinghua Univeristy
Toward Interactive Ray Tracing on Graphics Processors

*Prof. Yu Wang, Professor, Associate Professor, Tsinghua Univeristy
Memristor-based Approximated Computation: a framework for power efficient mixed-signal computing systems

*Prof. Lei He, Professor, University of California, Los Angeles
High sigma modeling for analog and custom circuits

*Prof. Mohammed S. BenSaleh, Professor, King Abdulaziz City for Science and Technology (KACST)
Optimal Solutions for Water Pipeline Monitoring using Wireless Sensor Network

*David (Wei) Chen, Professor, IBM,China
Speedup Industrial Research & Development Process Using High Performance Computing (HPC) Modeling and Simulation Technology

*Wenjian Yu,Professor , Tsinghua University
Tackle the Non-Manhattan Geometric Effects on Interconnect Capacitance Extraction with Innovative Random-Walk Techniques